A time-to-digital converter (TDC) translates a time difference between two input timing signals into a digital output bus. Depending on architecture, a TDC may function as a phase detector, a frequency detector, or both. A TDC monitors two digital timing signals and decides which timing signal arrived first. A TDC optionally monitors two timing signals to determine and digitally encode the time difference between the timing signals. A TDC also produces an output signal or bus of signals that encodes the time difference of which timing signal arrived first.
Known TDCs suffer from inadequate resolution. For example, in all-digital phase locked loops, inadequate resolution may result in a static phase error, while in multiplying delay locked loops, inadequate resolution may result in deterministic jitter.